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Analog And Mixed-Signal Intergrated Circuit Design Lab.

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Three-dimensional Shape Recovery from Image Focus Using Polynomial Regression Analysis in Optical Microscopy
  • AuthorSung-An Lee and Byung-Geun Lee
  • Year2020
  • SourceCurrent Optics and Photonics

A Hardware and Energy-Efficient Online Learning Neural Network with an RRAM Crossbar Array and Stochastic Neurons
  • AuthorInjune Yeo, Sang-Gyun Gi, Byung-Geun Lee, and Gunuk Wang
  • Year2020
  • SourceIEEE Transactions on Industrial Electronics

WOx-Based Synapse Device With Excellent Conductance Uniformity for Hardware Neural Networks
  • AuthorWooseok Choi, Sang-Gyun Gi, Donguk Lee, Seokjae Lim, Chuljun Lee, Byung-Geun Lee, and Hyunsang Hwang
  • Year2020
  • SourceIEEE TRANSACTIONS ON NANOTECHNOLOGY

A Compressive Sensing CMOS Image Sensor with Partition Sampling Technique
  • AuthorHyunkeun Lee, Woo-Tae Kim, Jinho Kim, Myonglae Chu, and Byung-Geun Lee
  • Year2020
  • SourceIEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

An On-Chip Binary-Weight Convolution CMOS Image Sensor for Neural Networks
  • AuthorWoo-Tae Kim, Hyunkeun Lee, Jung-Gyun Kim, and Byung-Geun Lee
  • Year2020
  • SourceIEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

A 12-bit 40MS/s SAR ADC with Digital Foreground Self-Calibration for Capacitor Mismatches
  • AuthorInjune Yeo, and Byung-Geun Lee
  • Year2020
  • SourceJOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE

A Compressive Sensing-based Automatic Sleep-Stage Classification System with Radial Basis Function Neural Network
  • AuthorHyunkeun Lee, Jinyoung Choi, Seunghun Kim, Sung-Chan Jun, and Byung-Geun Lee
  • Year2019
  • SourceIEEE Access

A Low-power Extended-counting Delta-sigma ADC for CMOS Image Sensors
  • AuthorWoo-Tae Kim, and Byung-Geun Lee
  • Year2019
  • SourceJOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.19, NO.6, DECEMBER, 2019

A 10-bit, 50-MS/s Cyclic and SAR Combined Two-stage ADC with Gain Error Calibration
  • AuthorCheonwi Park, and Byung-Geun Lee
  • Year2019
  • SourceJOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.19, NO.6, DECEMBER, 2019

A Power and Area Efficient CMOS Stochastic Neuron for Neural Networks Employing Resistive Crossbar Array
  • AuthorInjune Yeo, Myonglae Chu, Byung-Geun Lee
  • Year2019
  • SourceIEEE Transactions on Biomedical Circuits and Systems PP(99):1-1, October 2019 
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